Metering & Power Quality
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Dear Experts,
I want to share some observation related to power quality issue in Indonesia. I hope, I also get information about same thing in another country.
To achieve energy efficiency, "energy saving" product are adopted in many building project. From new freshly build shopping mall to old retrofitted office. Due to this energy saving technology adoption, I observed some trend shifting in power system characteristic. Here is some point I see
1. Capacitor bank operating at lesser step.
Compare to industrial system, capacitor in building are operating in lesser step. It's common these days, only 1 or 2 steps - out of 12 steps - are in operation.
for example: In one brand new big shopping mall, they have install 6 unit 1200 kVAR capacitor bank, 1 bank for each transformer, and none of them are operating. Because the cos-phi of system is already 0.98 without any additional kVAR compensation. They've already install VSD on all fan, pump, and chiller. They also have use LED lamp in all place.
2. More and more capacitor bank failure
Commonly it fail due to harmonic resonance. One interesting phenomena, if the failure happens it is ALWAYS happen on 1st step AND at low load condition (middle night, shift changing, holiday).
3. Even though the THDi level at equipment could achieve 70%, the THDi at outgoing trafo (LV) is around 20%.
The highest level I've ever observed in that point is 23%. This is condition when capacitor bank OFF. if the cap bank active, due to resonance, it could achieve 45%.
So, the trend of electrical characteristic of building are "Cos-phi become closer to 1, however THDi are increasing". The consequence is, in near future, people will ask more Accusine rather than Capacitor bank.
How is your country? What is the typical THDi and PF at PCC in Building/Industri there?
Thank you for sharing
Best regards,
Yorga
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Good observation. This is quite common phenomena whenever there's an increase installation and usage of energy savings devices in the buildings. These energy saving devices are typically a power electronics based products such as VSD, DC power supplies; and building loads are typically nonlinear loads such as computers, copier, fax machines, etc.
Due to the existence of harmonics, the definition of power factors (PF) "evolved" into 3 terminologies, i.e. Displacement PF (50/60Hz component), Distortion PF (harmonics components) and Total/True PF (TPF=displacement PF x distortion PF). In recap, the cap bank is used to compensate only the 50/60Hz fundamental component (displacement PF) and not distortion PF. Active harmonic filter is used to reduce harmonics and hence improving distortion PF. That's reason why capacitor bank is operating lesser steps in 1-2 steps region typically, and it's quite a common phenomena if there's lots of nonlinear loads in the network.
However, there's another trend coming up, which is leading PF caused by "Buck-Boost" type of rectifier circuit. This buck-boost rectifier circuit will have low THDi and leading PF. This design if fairly new and soon there'll be a need to have PFV+ solutions everywhere to make the PF=1.
Frankly speaking THDi is not a good way of determine the severity of the harmonic conditions due to its formula where the denominator is Irms which is fluctuating. Thus, you will notice there's different reading between equipment level and PCC (outgoing of transformer). Assuming the numerator is the same (say 70A), the denominator is different (say equipment is 100A and total current at LV side of the transformer is 350A), and hence you have THDi=70% at equipment level and THDi=20% at transformer LV. That's why IEEE 519 introduced TDD (total demand distortion) as a way to determine the severity of the harmonic conditions.
I hope this helps.
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Good observation. This is quite common phenomena whenever there's an increase installation and usage of energy savings devices in the buildings. These energy saving devices are typically a power electronics based products such as VSD, DC power supplies; and building loads are typically nonlinear loads such as computers, copier, fax machines, etc.
Due to the existence of harmonics, the definition of power factors (PF) "evolved" into 3 terminologies, i.e. Displacement PF (50/60Hz component), Distortion PF (harmonics components) and Total/True PF (TPF=displacement PF x distortion PF). In recap, the cap bank is used to compensate only the 50/60Hz fundamental component (displacement PF) and not distortion PF. Active harmonic filter is used to reduce harmonics and hence improving distortion PF. That's reason why capacitor bank is operating lesser steps in 1-2 steps region typically, and it's quite a common phenomena if there's lots of nonlinear loads in the network.
However, there's another trend coming up, which is leading PF caused by "Buck-Boost" type of rectifier circuit. This buck-boost rectifier circuit will have low THDi and leading PF. This design if fairly new and soon there'll be a need to have PFV+ solutions everywhere to make the PF=1.
Frankly speaking THDi is not a good way of determine the severity of the harmonic conditions due to its formula where the denominator is Irms which is fluctuating. Thus, you will notice there's different reading between equipment level and PCC (outgoing of transformer). Assuming the numerator is the same (say 70A), the denominator is different (say equipment is 100A and total current at LV side of the transformer is 350A), and hence you have THDi=70% at equipment level and THDi=20% at transformer LV. That's why IEEE 519 introduced TDD (total demand distortion) as a way to determine the severity of the harmonic conditions.
I hope this helps.
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Thank you John for your sharing
You are right. The proper metric to measure severity of Harmonic is not THDi, but TDD.
I have some discussion with consultant and panel builder. We want to propose better solution to face this electrical environment shifting.
The consultant tell me story during early time of capacitor bank adoption. At that time being, the capacitor size should be determined from actual measurement, pretty much like what we did for Accusine sizing this day. They finally find "rule of thumb" that optimum capacitor sizing is about 30% of transformer rating. And that makes sense for dominant loads - e.g. induction motor - that typically has PF 0.8.
And that's great for consultant as they often start from the scratch to make new building.
Since electronic load (VSD, LED, etc) continue to be adopted in new building. we need to find out those "rule of thumb" for accusine. I have data from what saw here in Indonesia TDD in PCC is about 20% to 25%. And I also want to know what is the typical TDD in other country, especially in developed country like Singapore, etc.
that my intention. If anybody has another experience please share 🙂
regards,
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great discussion! here in the training group we see / hear issues with retrofit of existing buildings, more often. the use of switched mode power supplies with power electronics (say to power 200 laptops of the employees of a new company moving into an old building) now those non linear power electronic devices introduce current harmonics into the system with low impedence. in this case a somewhat high % of 3rd harmonic which is a triplen harmonic. 3, 9, 15, 21, etc.... being 0 sequence those currents are additive on the neutral wire of a Y configuration system. so it can overload the neutral conductor that maybe was size a long while ago and not accounting for the increase use of those non linear power electronic devices. so we here these types of cause / effect scenarios. I know it is off topic just a bit, but I wanted to add a retrofit / brownfield scenario as well.
I agree TDD(I) is much more preferable. a VSD at low load can show a very high THD maybe providing an incomplete / amplified picture of the actual distortion levels.
thanks again.
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